A. Field of the Invention
The present invention relates to a semiconductor device manufacturing method having a step of irradiating a semiconductor substrate with an electron beam, and to a semiconductor device manufactured by the method.
B. Description of the Related Art
In general, bipolar semiconductor devices, in which the minority carrier is the conductive carrier, include p-i-n diodes, insulating gate bipolar transistors (IGBTs) and the like. Bipolar power semiconductor devices have a wide range of voltage ratings, from about 600 V to 6500 V.
On the other hand, the majority carrier is the conductive carrier in unipolar power semiconductor devices, of which power MOSFETs (MOSFET: insulted-gate field effect transistors) are the leading example. A power MOSFET is operated by the majority carrier (electrons) during forward conduction. During reverse bias, however, a parasitic diode operates between the p-type base layer and the n-drift layer and n-drain layer. That is, the minority carrier (holes) is injected from the p-type base layer into the n-drift layer, with reverse conduction characteristics. Thus, the operations of the power MOSFET are bipolar during reverse conduction. The voltage rating of a power MOSFET is roughly tens of volts to 1000 V.
In the case of a bipolar power semiconductor device, low voltage depression is achieved because a carrier (electrons, holes) with an exponentially higher concentration than the drift layer accumulates in the drift layer during conduction. When the conduction state changes to a blocking state, or during switching in other words, all of this accumulated carrier needs to be swept away in order to deplete the drift layer. This means that switching takes some time. Thus, the key to achieving both low loss characteristics and high-speed switching characteristics in a bipolar power semiconductor device is to find a way of swiftly sweeping away the accumulated carrier while maintaining low voltage depression.
One way to achieve rapid switching of a bipolar power semiconductor device is by electron beam irradiation. Irradiating a power semiconductor device with an electron beam serves to introduce crystal defects broadly (deeply) into the drift layer in particular of the semiconductor substrate, forming recombination centers. The switching time can be reduced as a result. A common method of electron beam irradiation is to irradiate a monocrystalline wafer with an electron beam with an acceleration energy of approximately 2 MeV to 5 MeV. The crystal defect concentration is controlled by adjusting the irradiation dose of the electron beam. Accelerated switching can then be achieved by annealing the wafer for a set period of time at 200° C. to 500° C. to form recombination centers.
Japanese Patent Application Publication No. 2004-273863 describes a method whereby the acceleration energy is increased to 10 MeV to simultaneously irradiate multiple silicon wafers with an electron beam and thereby reduce costs by reducing the number of irradiations.
U.S. Pat. No. 6,475,432 describes a wafer stack structure for irradiating multiple wafers with an electron beam, and a stack manufacturing method. U.S. Pat. No. 6,475,432 does not describe a method for irradiating the wafer stack with an electron beam
In general, an irradiation dose of about 10 kGy can be used per irradiation in electron beam irradiation. If the necessary irradiation dose for achieving the desired high-speed switching characteristics is 100 kGy, 10 irradiations are required, and variation per irradiation increases with the number of irradiations. The reason for fixing the irradiation dose and adjusting the number of irradiations as necessary has to do with the fact that precise dose adjustment for each product generally increases costs and decreases throughput on a commercial basis. Thus, when irradiation is repeated 10 times or so it produces about 20% variation in the irradiation dose. This variation in the irradiation dose causes variability of the element characteristics because it leads to variation in the crystal defect concentration of the semiconductor substrate.
As described in Japanese Patent Application Publication No. 2004-273863, for example, when multiple wafers are irradiated in one irradiation operation, the differences and variation in the irradiation dose tend to increase because the thickness from the closest wafer to the furthest wafer from the irradiation source amounts to several mm.
The high-speed switching characteristics are positively correlated with the irradiation dose of the electron beam. Thus, the switching time can be reduced and the high-speed switching characteristics improved by increasing the number of electron beam irradiations. However, because there is more variation in the irradiation dose as discussed above, the characteristics are less uniform due to variation in the crystal defects. There is urgent demand for reductions and management of variability for automotive applications in particular, and a need for ways to achieve both lower-cost electron beam irradiation and more uniform characteristics.
The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.